Deceptive Logic Locking for Hardware Integrity Protection Against Machine Learning Attacks

Logic locking has emerged as a prominent key-driven technique to protect the integrity of integrated circuits. However, novel machine-learning-based attacks have recently been introduced challenge security foundations schemes. These are able recover significant percentage key without having access an activated circuit. This article address this issue through two focal points. First, we present theoretical model test schemes for key-related structural leakage that can be exploited by machine learning. Second, based on model, introduce D-MUX: deceptive multiplexer-based logic-locking scheme is resilient against structure-exploiting learning attacks. Through design D-MUX, uncover major fallacy in existing form structural-analysis attack. Finally, extensive cost evaluation D-MUX presented. To best our knowledge, first machine-learning-resilient capable protecting all known learning-based Hereby, presented work offers starting point and future-generation logic era